A memory bank is generally a logical unit of storage in electronics, which is hardware-dependent. In a computer, for example, the memory bank may be determined by the physical organization of the hardware memory. In a typical static random-access memory (static RAM or SRAM), a bank may include of multiple rows and columns of storage units, and is usually spread out across circuits. An SRAM is a type of semiconductor memory that uses bi-stable latching circuitry (e.g., a flip-flop or a portion thereof) to store each bit. In a single read or write operation, generally only one bank is accessed. Often a memory may be referred to as a register file.
Often bit cell based register files are typically organized in multiple array banks. Each bank may be organized with multiple bit-cells on a local bit line. Wherein the bit line is local to the bank. Generally, a bit line conveys information when a memory access (e.g., read, write) occurs. Each bank may be connected to a dynamic global bit line that runs through or is included by each bank (hence, the global nature of the bit-line).
Generally, the global bit line is attached to two circuits. A keeper or pull-down device which serves the purpose of retaining the state of the global bit line when it is not actively driven. And a separate precharge device that pulls the global bit line “high” or up after the evaluation phase of the memory access completes.
Often the demands placed on the global bit line cause issues with the register file. For example, the keeper device is required to work across a wide range of process, voltage and temperature (PVT) variations, and prevent the global bit line from leaking current and transitioning to “low” when it is not desired. In another example, a contention may exist between the keeper device (pulling the global bit line “high”) and a bank's bit line pull down device (pulling the global bit line “low”). Often this limits the minimum voltage or lowest operating voltage, of the SRAM.
Likewise, issues often exist with the precharge device. The global bit line precharge device is usually placed at the far end of a long wire (the global bit line) that spans the width of the memory and connects multiple banks. The precharge device frequently has to pull the global bit line “high” through a fairly large resistance-capacitance (RC) network. This generally results in a high precharge time, which limits the maximum operating frequency of the memory. In addition, the global bit line precharge device is usually a large device to supply sufficient charge to the large global bit line capacitance. As a result, during the portion of a memory access, a large current often flows through the precharge portion putting stress on the power supply grid.